China DOS Union

Mainly divided into three levels for easy repetition in similar ranges of one level.

China National Living Electricity Standard Level
Power sources for living, work, and study places, power voltages of computer machines, power outages,

Circuit Standard Level of Machine Interiors
Motherboard
Processor <CPU>
Memory
Hard disk
Input
Output

Human-Machine Interface
Keyboard
Display screen
Mouse

Output Devices
Sound card
Graphics card

Input Devices
Floppy drive
CD-ROM
USB flash drive
Writing tablet
Drawing tablet
Network card
Wireless card
Bluetooth device
Infrared device

Special Paths for Living, Study, and Work
Living expenses, medical procedures, transactions, pension
Study
Work

Lazy Man's Intelligent Home Life System
Living, sleeping
Eating, having meals
Clothing, clothes
Travel, sports and vehicles
Pleasure, body and mind

Robots
Mechanical robot concept
Semi-automated robot concept
Special task automated robot
Intelligent full-function low-level robot
Intelligent intermediate robot
Intelligent advanced robot

Human Self-Inclusion
A person is on the basis established by oneself, starting from the fundamental body as the main body, forming an integrated process, self-transformation.

[ Last edited by zzz19760225 on 2016-2-6 at 23:02 ]

August 2014

Loongson Technology Corporation Limited

Copyright Notice

This document is the property of Loongson Technology Corporation Limited and all rights are reserved. Without written permission, no company or individual may disclose, reproduce or distribute any part of this document to a third party. Otherwise, legal responsibilities will be investigated.

Disclaimer

This document only provides interim information. The contained content may be updated at any time according to the actual situation of the product without prior notice. The company shall not be liable for any direct or indirect losses caused by improper use of this document.

Loongson Technology Corporation Limited

Loongson Technology Corporation Limited

Address: Building No.2, Loongson Industrial Park, Zhongguancun Environmental Protection Park, Haidian District, Beijing

Tel: 010-62546668

Fax: 010-62600826

http://www.loongson.cn/product/cpu/2/Loongson2H.html

[ Last edited by zzz19760225 on 2016-2-6 at 23:19 ]

Reading Guide
The "Loongson 2H Processor User Manual" mainly introduces the architecture and register description of Loongson 2H; it includes two parts: the user manual and the on-chip device usage guide. The software programming guide introduces common problems in the BIOS and operating system development process. For the relevant information about the LS464 high-performance processor core integrated in the Loongson 2H processor, please refer to the "Loongson LS464 Processor Core User Manual".

Revision History
Serial Number Update Date Version Number Update Content
1 2012-11 V1.0 First draft, first formal release
2 2013-11 V1.1 Correct several spelling errors, correct CLKSEL1 description, EJTAG DROP register
3 2014-03 V1.2 Configuration Update to version 2H3, add CHIPID, USB PHY configuration, PCIE add bus error masking and insertion status detection, add HPET and PWM chapters
4 2014-08 V1.3 Document layout, correct several text errors

MIPS Instruction Set (Total 31 Instructions)
Tags: Extension
2011-08-30 10:06 38334 views Comment(1) Favorite Report
Category: MIPS (3)

MIPS Instruction Set (Total 31 Instructions)
MIPS Instruction Set (Total 31 Instructions)

Mnemonics

Instruction Format

Example

Example Meaning

Operation and Explanation

Bit #

31..26

25..21

20..16

15..11

10..6

5..0







R-type

op

rs

rt

rd

shamt

func







add

000000

rs

rt

rd

00000

100000

add $1,$2,$3

$1=$2+$3

rd <- rs + rt ；where rs=$2, rt=$3, rd=$1

addu

000000

rs

rt

rd

00000

100001

addu $1,$2,$3

$1=$2+$3

rd <- rs + rt ；where rs=$2, rt=$3, rd=$1, unsigned number

sub

000000

rs

rt

rd

00000

100010

sub $1,$2,$3

$1=$2-$3

rd <- rs - rt ；where rs=$2, rt=$3, rd=$1

subu

000000

rs

rt

rd

00000

100011

subu $1,$2,$3

$1=$2-$3

rd <- rs - rt ；where rs=$2, rt=$3, rd=$1, unsigned number

and

000000

rs

rt

rd

00000

100100

and $1,$2,$3

$1=$2 & $3

rd <- rs & rt ；where rs=$2, rt=$3, rd=$1

or

000000

rs

rt

rd

00000

100101

or $1,$2,$3

$1=$2 | $3

rd <- rs | rt ；where rs=$2, rt=$3, rd=$1

xor

000000

rs

rt

rd

00000

100110

xor $1,$2,$3

$1=$2 ^ $3

rd <- rs xor rt ；where rs=$2, rt=$3, rd=$1 (XOR)

nor

000000

rs

rt

rd

00000

100111

nor $1,$2,$3

$1=~($2 | $3)

rd <- not(rs | rt) ；where rs=$2, rt=$3, rd=$1 (NOR)

slt

000000

rs

rt

rd

00000

101010

slt $1,$2,$3

if($2<$3)
$1=1 else
$1=0

if (rs < rt) rd=1 else rd=0 ；where rs=$2, rt=$3, rd=$1

sltu

000000

rs

rt

rd

00000

101011

sltu $1,$2,$3

if($2<$3)
$1=1 else
$1=0

if (rs < rt) rd=1 else rd=0 ；where rs=$2, rt=$3, rd=$1
(unsigned number)

sll

000000

00000

rt

rd

shamt

000000

sll $1,$2,10

$1=$2<<10

rd <- rt << shamt ；shamt stores the number of shifts,
that is, the immediate in the instruction, where rt=$2, rd=$1

srl

000000

00000

rt

rd

shamt

000010

srl $1,$2,10

$1=$2>>10

rd <- rt >> shamt ；(logical) , where rt=$2, rd=$1

sra

000000

00000

rt

rd

shamt

000011

sra $1,$2,10

$1=$2>>10

rd <- rt >> shamt ；(arithmetic) Note that the sign bit is retained
where rt=$2, rd=$1

sllv

000000

rs

rt

rd

00000

000100

sllv $1,$2,$3

$1=$2<<$3

rd <- rt << rs ；where rs=$3, rt=$2, rd=$1

srlv

000000

rs

rt

rd

00000

000110

srlv $1,$2,$3

$1=$2>>$3

rd <- rt >> rs ；(logical) where rs=$3, rt=$2, rd=$1

srav

000000

rs

rt

rd

00000

000111

srav $1,$2,$3

$1=$2>>$3

rd <- rt >> rs ；(arithmetic) Note that the sign bit is retained
where rs=$3, rt=$2, rd=$1

jr

000000

rs

00000

00000

00000

001000

jr $31

goto $31

PC <- rs

I-type

op

rs

rt

immediate







addi

001000

rs

rt

immediate

addi $1,$2,100

$1=$2+100

rt <- rs + (sign-extend)immediate ；where rt=$1, rs=$2

addiu

001001

rs

rt

immediate

addiu $1,$2,100

$1=$2+100

rt <- rs + (zero-extend)immediate ；where rt=$1, rs=$2

andi

001100

rs

rt

immediate

andi $1,$2,10

$1=$2 & 10

rt <- rs & (zero-extend)immediate ；where rt=$1, rs=$2

ori

001101

rs

rt

immediate

andi $1,$2,10

$1=$2 | 10

rt <- rs | (zero-extend)immediate ；where rt=$1, rs=$2

xori

001110

rs

rt

immediate

andi $1,$2,10

$1=$2 ^ 10

rt <- rs xor (zero-extend)immediate ；where rt=$1, rs=$2

lui

001111

00000

rt

immediate

lui $1,100

$1=100*65536

rt <- immediate*65536 ；Put the 16-bit immediate in the high 16 bits of the destination register
The low 16 bits of the destination register are filled with 0

lw

100011

rs

rt

immediate

lw $1,10($2)

$1=memory


rt <- memory ；rt=$1, rs=$2

sw

101011

rs

rt

immediate

sw $1,10($2)

memory
=$1

memory <- rt ；rt=$1, rs=$2

beq

000100

rs

rt

immediate

beq $1,$2,10

if($1==$2)
goto PC+4+40

if (rs == rt) PC <- PC+4 + (sign-extend)immediate<<2

bne

000101

rs

rt

immediate

bne $1,$2,10

if($1!=$2)
goto PC+4+40

if (rs != rt) PC <- PC+4 + (sign-extend)immediate<<2

slti

001010

rs

rt

immediate

slti $1,$2,10

if($2<10)
$1=1 else
$1=0

if (rs <(sign-extend)immediate) rt=1 else rt=0 ；
where rs=$2, rt=$1

sltiu

001011

rs

rt

immediate

sltiu $1,$2,10

if($2<10)
$1=1 else
$1=0

if (rs <(zero-extend)immediate) rt=1 else rt=0 ；
where rs=$2, rt=$1

J-type

op

address







j

000010

address

j 10000

goto 10000

PC <- (PC+4),address,0,0 ；address=10000/4

jal

000011

address

jal 10000

$31<-PC+4;
goto 10000

$31<-PC+4；PC <- (PC+4),address,0,0
；address=10000/4

Note: Since MIPS16 has only 16 16-bit registers, the $31 in the JAL instruction is changed to $15, and all immediates do not need to be extended. The LUI instruction directly assigns the immediate to the RT register.

[ Last edited by zzz19760225 on 2017-6-14 at 01:43 ]