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MIPS Architecture -- Instruction Set
Tags: MIPS core assembly
2016-04-02 18:36 1458 views Comments(0) Favorite Report
Classification: MIPS Architecture (5)
Copyright Notice: This article is an original article by the blogger. Reproduction is not permitted without the blogger's permission.
Table of Contents(?)
Assembly Instructions under the MIPS Architecture
An instruction set is a hard program stored inside the CPU that guides and optimizes CPU operations. With these instruction sets, the CPU can run more efficiently.
Style of MIPS Assembly Language
Format of Assembly Language Instructions
Operator
Label: (optional)
Marks the memory address, must be followed by a colon
Usually appears in data and code segments
Operator
Defines the operation (such as add, sub, etc.)
Operand
Indicates the data required for the operation
Operands can be registers, memory variables, or constants
Most instructions have 3 operands
1
2
3
# this is a comment
entrypoint: # that’s a label
add $1 , $2, $3 # (registers) $1 = $2 + $3
xxx: —— Defines the entry point of the code and the storage segment of the named data segment
Program Structure
The program structure of assembly language is data declaration + code segment + data segment (file suffix is .s or .asm), and data declaration comes after the code segment (actually, it's okay before it, and it's more in line with the habits of high-level programming)
Data Declaration
The data segment starts with .data
After declaring a variable, space is allocated in the main memory (RAM).
1
2
3
4
5
6
7
Example:
var1:
.word 3 # Declare a word-type variable var1 and assign it the value 3
array1:
.byte 'a','b' # Declare an array array1 that stores 2 characters and assign 'a', 'b'
array2:
.space 40 # Allocate 40 bytes (bytes) of unused continuous space for variable array2. Of course, for this variable
Code Segment:
The code segment starts with .text
Actually, it's various instruction operations
The program entry is marked by main: (it's all the same)
Program end mark (see below for details)
Others:
.data //Data segment
.text //Code segment
.globl //Global symbol declaration
.align 0 //Turn off all automatic alignment
.asciiz //String (with terminator)
Registers
32 general-purpose registers:
MIPS register convention, a set of 32 registers
0 zero: always returns 0
1 at: (assembly temporary register) reserved for assembly
2-3 v0, v1: store sub-function call return results, can also be used for expression evaluation
4-7 a0 - a3: store parameters passed to sub-functions
8-15 t0- t7: store temporary operation results, their contents do not need to be saved when a function call occurs
24,25 t8-t9:
16-23 s0 - s7: store local variables, generally need to save their contents when a function call occurs
26,27 k0, k1: reserved for interrupt/trap handling, you can also change
28 gp: global pointer
29 sp: stack pointer
30 s8/fp: frame pointer
31 ra: return address (for procedure call)
Data Types
A single operation of the MIPS CPU can load or store 1 to 8 bytes of data.
MIPS Name
Size (bytes)
Assembler mnemonic
dword 8 “d” stands for ld
word 4 “w” stands for lw
halfword 2 “h” stands for lh
byte 1 “b” stands for lb `
Instruction Operations
Load and Store (load, store)
Load
Load word/halfword/byte data from a memory address into a register
lw r, a R<-a
lh r, a Unsigned
lb r, a Unsigned
lhu Signed
lhbu Signed
li r,c Load immediate
Store
Store data in a register to a memory address
Sw r, a R->a
Sh r, a Store low halfword
Sb r, a Store low byte
Move:
Direct exchange of data between registers
move r , s R<-s
Logical Operations
and r, s, t R <-s . t
or r, s, t R <-s + t
not r, s R <-s inverted
xor r, s, t R <-s XOR t
nor r, s, t R <-(s+t) then inverted
Arithmetic Operations
add r, s, t R->s + t
sub r, s, t R->s – t
mul r, s, t R->s*t
div r, s, t R->s/t
hi and lo are the result interfaces related to the multiplier register, and cannot be used for operations other than multiplication and division. For the above two, there is no direct addressing; you must access the corresponding content through the mfhi ("move from hi") and mflo ("move from lo") instructions respectively.
Multiplication - stores the result of multiplying two integers into the specified registers in two parts.
Division - the lo register stores the result (quotient), and the hi register stores the remainder.
Shift Operations
sll r, s, c r ← shift s left c bits
srl r, s, c r ← shift s right c bits
Branch Operations
Jump to tag through conditional judgment
b tag Jump->tag
beq r, s, tag R=s ->tag
bne r, s, tag R != s->tag
bgt r, s, tag R > s->tag
bge r, s, tag R >=s->tag
blt r, s, tag R < s->tag
ble r, s, tag R<=s->tag
Comparison Instructions
slt r, s, t S < t
sle r, s, t S <= t
sgt r, s, t S >t
sge r, s, t S >= t
seq r, s, t S = t
sne r, s, t S != t
FALSE r <- 0
TRUE r <- 1
Addressing Modes
Immediate Addressing:
MIPS has only one addressing mode. Any load or store machine instruction can be written as
lw $1, offset($2)
You can use any register as the target and source register. The offset is a signed 16-bit number (so it can be any value between -32768 and 32767). The program address for loading is the address formed by the sum of the source register and the offset.
($t0) —— Default to offset $t0 bytes from address 0
Accessing Continuous Memory Space:
Access to data such as strings may be required according to the actual needs of the program.
.ascii s ASCII encoded characters of string s
.asciiz s l ike .ascii, null-terminated
.word w1, w2,… 32-bit words w1, w2, . . .
.half h 1, h 2, . . . 16-bit halfwords h 1, h 2, . . .
.byte b1, b2, . . . 8-bit bytes b1, b2, . . .
.float f1, f2, . . . 32-bit single precision floating point numbers f1, f2, . . .
.double d1, d2, . . . 64-bit double precision floating point numbers d1, d2, . . .
.space n n zero bytes
For example:
1
2
.data
str: .asciiz "hello word"
System Call: syscall
MIPS provides a special syscall instruction to get services from the operating system
Use syscall system service
Read the service number from the $v0 register
Read parameter values from registers such as $a0, $a1, etc. (if any)
Send the syscall instruction
Retrieve the return value from the result register (if any)
The $v0 contains the call number (total 12):
Service $v0 Arguments / Result
Print Integer 1 $a0 = integer value to print
Print Float 2 $f12 = float value to print
Print Double 3 $f12 = double vlaue to print
print String 4 $a0 = address of null-terminated string
Read Integer 5 $v0 = integer read
Read Float 6 $f0 = float read
Read Double 7 $f0 = double read
Read String 8 $a0 = address of input buffer$a1 = maximum number of characters to read
Exit Program 10
Print Char 11 $a0 = character to print
Read Char 12 $a0 = character read
Procedure Call
jal a （jump and link）Jump to address a and store the address of the next instruction in the $ra register
j $ra Return to the position when the program jumped, unconditional jump
[ Last edited by zzz19760225 on 2017-6-15 at 23:33 ]
MIPS Architecture -- Instruction Set
Tags: MIPS core assembly
2016-04-02 18:36 1458 views Comments(0) Favorite Report
Classification: MIPS Architecture (5)
Copyright Notice: This article is an original article by the blogger. Reproduction is not permitted without the blogger's permission.
Table of Contents(?)
Assembly Instructions under the MIPS Architecture
An instruction set is a hard program stored inside the CPU that guides and optimizes CPU operations. With these instruction sets, the CPU can run more efficiently.
Style of MIPS Assembly Language
Format of Assembly Language Instructions
Operator
Label: (optional)
Marks the memory address, must be followed by a colon
Usually appears in data and code segments
Operator
Defines the operation (such as add, sub, etc.)
Operand
Indicates the data required for the operation
Operands can be registers, memory variables, or constants
Most instructions have 3 operands
1
2
3
# this is a comment
entrypoint: # that’s a label
add $1 , $2, $3 # (registers) $1 = $2 + $3
xxx: —— Defines the entry point of the code and the storage segment of the named data segment
Program Structure
The program structure of assembly language is data declaration + code segment + data segment (file suffix is .s or .asm), and data declaration comes after the code segment (actually, it's okay before it, and it's more in line with the habits of high-level programming)
Data Declaration
The data segment starts with .data
After declaring a variable, space is allocated in the main memory (RAM).
1
2
3
4
5
6
7
Example:
var1:
.word 3 # Declare a word-type variable var1 and assign it the value 3
array1:
.byte 'a','b' # Declare an array array1 that stores 2 characters and assign 'a', 'b'
array2:
.space 40 # Allocate 40 bytes (bytes) of unused continuous space for variable array2. Of course, for this variable
Code Segment:
The code segment starts with .text
Actually, it's various instruction operations
The program entry is marked by main: (it's all the same)
Program end mark (see below for details)
Others:
.data //Data segment
.text //Code segment
.globl //Global symbol declaration
.align 0 //Turn off all automatic alignment
.asciiz //String (with terminator)
Registers
32 general-purpose registers:
MIPS register convention, a set of 32 registers
0 zero: always returns 0
1 at: (assembly temporary register) reserved for assembly
2-3 v0, v1: store sub-function call return results, can also be used for expression evaluation
4-7 a0 - a3: store parameters passed to sub-functions
8-15 t0- t7: store temporary operation results, their contents do not need to be saved when a function call occurs
24,25 t8-t9:
16-23 s0 - s7: store local variables, generally need to save their contents when a function call occurs
26,27 k0, k1: reserved for interrupt/trap handling, you can also change
28 gp: global pointer
29 sp: stack pointer
30 s8/fp: frame pointer
31 ra: return address (for procedure call)
Data Types
A single operation of the MIPS CPU can load or store 1 to 8 bytes of data.
MIPS Name
Size (bytes)
Assembler mnemonic
dword 8 “d” stands for ld
word 4 “w” stands for lw
halfword 2 “h” stands for lh
byte 1 “b” stands for lb `
Instruction Operations
Load and Store (load, store)
Load
Load word/halfword/byte data from a memory address into a register
lw r, a R<-a
lh r, a Unsigned
lb r, a Unsigned
lhu Signed
lhbu Signed
li r,c Load immediate
Store
Store data in a register to a memory address
Sw r, a R->a
Sh r, a Store low halfword
Sb r, a Store low byte
Move:
Direct exchange of data between registers
move r , s R<-s
Logical Operations
and r, s, t R <-s . t
or r, s, t R <-s + t
not r, s R <-s inverted
xor r, s, t R <-s XOR t
nor r, s, t R <-(s+t) then inverted
Arithmetic Operations
add r, s, t R->s + t
sub r, s, t R->s – t
mul r, s, t R->s*t
div r, s, t R->s/t
hi and lo are the result interfaces related to the multiplier register, and cannot be used for operations other than multiplication and division. For the above two, there is no direct addressing; you must access the corresponding content through the mfhi ("move from hi") and mflo ("move from lo") instructions respectively.
Multiplication - stores the result of multiplying two integers into the specified registers in two parts.
Division - the lo register stores the result (quotient), and the hi register stores the remainder.
Shift Operations
sll r, s, c r ← shift s left c bits
srl r, s, c r ← shift s right c bits
Branch Operations
Jump to tag through conditional judgment
b tag Jump->tag
beq r, s, tag R=s ->tag
bne r, s, tag R != s->tag
bgt r, s, tag R > s->tag
bge r, s, tag R >=s->tag
blt r, s, tag R < s->tag
ble r, s, tag R<=s->tag
Comparison Instructions
slt r, s, t S < t
sle r, s, t S <= t
sgt r, s, t S >t
sge r, s, t S >= t
seq r, s, t S = t
sne r, s, t S != t
FALSE r <- 0
TRUE r <- 1
Addressing Modes
Immediate Addressing:
MIPS has only one addressing mode. Any load or store machine instruction can be written as
lw $1, offset($2)
You can use any register as the target and source register. The offset is a signed 16-bit number (so it can be any value between -32768 and 32767). The program address for loading is the address formed by the sum of the source register and the offset.
($t0) —— Default to offset $t0 bytes from address 0
Accessing Continuous Memory Space:
Access to data such as strings may be required according to the actual needs of the program.
.ascii s ASCII encoded characters of string s
.asciiz s l ike .ascii, null-terminated
.word w1, w2,… 32-bit words w1, w2, . . .
.half h 1, h 2, . . . 16-bit halfwords h 1, h 2, . . .
.byte b1, b2, . . . 8-bit bytes b1, b2, . . .
.float f1, f2, . . . 32-bit single precision floating point numbers f1, f2, . . .
.double d1, d2, . . . 64-bit double precision floating point numbers d1, d2, . . .
.space n n zero bytes
For example:
1
2
.data
str: .asciiz "hello word"
System Call: syscall
MIPS provides a special syscall instruction to get services from the operating system
Use syscall system service
Read the service number from the $v0 register
Read parameter values from registers such as $a0, $a1, etc. (if any)
Send the syscall instruction
Retrieve the return value from the result register (if any)
The $v0 contains the call number (total 12):
Service $v0 Arguments / Result
Print Integer 1 $a0 = integer value to print
Print Float 2 $f12 = float value to print
Print Double 3 $f12 = double vlaue to print
print String 4 $a0 = address of null-terminated string
Read Integer 5 $v0 = integer read
Read Float 6 $f0 = float read
Read Double 7 $f0 = double read
Read String 8 $a0 = address of input buffer$a1 = maximum number of characters to read
Exit Program 10
Print Char 11 $a0 = character to print
Read Char 12 $a0 = character read
Procedure Call
jal a （jump and link）Jump to address a and store the address of the next instruction in the $ra register
j $ra Return to the position when the program jumped, unconditional jump
[ Last edited by zzz19760225 on 2017-6-15 at 23:33 ]
1<词>，2，3/段\，4{节}，5(章)。