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中国DOS联盟论坛 » DOS疑难解答 & 问题讨论 (解答室) » Question: How does a computer boot from ROM... View 6,088 Replies 31
Floor 16 Posted 2004-10-03 00:00 ·  中国 天津 南开区 联通
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I want to ask: Since RAM cannot be used, how is the SS segment set? Can't use call anymore?
Floor 17 Posted 2004-10-05 00:00 ·  中国 重庆 城口县 电信
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1. Provide relevant information and tutorials about the programs in the ROM. ------------------ It seems that the companies that write BIOS will never provide them, right? 2. Part of the program runs in the ROM and cannot use RAM --------------------------- This statement doesn't seem appropriate. ROM is read-only. The phrase "Part of the program runs in the ROM" should be changed to "The CPU will read the code from the ROM".
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Floor 18 Posted 2004-10-05 00:00 ·  中国 天津 南开区 联通
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1. I don't think it's right. For example, AMI provides a set of BIOS source codes for SIS chipset, and there are also FreeBIOS, OpenBIOS, etc.
2. Didn't understand your meaning
Floor 19 Posted 2004-10-06 00:00 ·  中国 重庆 城口县 电信
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The CPU will immediately start executing instructions from address FFFF0H





I have some questions regarding this sentence. The concept of address seems to be related to RAM (memory), while BIOS code instructions are in ROM (whether erasable or not). And this address FFFF:0, as I know, is the starting address where ROM is "mapped" into RAM. And this "mapping" process must occur after the POST process, because the validity of RAM must be detected first before mapping can be possible. That is to say, before POST, the address FFFF:0 should not exist, so how can the CPU start executing from here?
There are similar issues regarding the BIOS of the graphics card, and C0000 also does not seem to be the "graphics card BIOS". I only know that in early PC machines, it was used as the screen buffer for color displays (640*480*16), but modern graphics cards no longer use it in this way.
-----------------------
Taking the INTEL 586 as an example, after the reset signal ends, the south/north (specifically depending on the chipset) bridge will make the CPU issue a read instruction (the first bus cycle of the first boot instruction), that is, the CPU places FFFF0 on its own address pins. Then, through the south/north, I/O chip, the FFFF:0 signal is generated on the address pins of the BIOS. The address pins A0-A7 of the BIOS are at low level, and the BIOS is selected. The BIOS will place the code 5B3AH (Award BIOS) on its data pins. The I/O chip and south/north transfer this data to the CPU address line, and finally the CPU reads and executes it.
(Shorting the A10 IO CHRDY and B10 GND pins of the ISA slot can make the CPU always in the above "first read instruction" state, - actually it is to read the first instruction stored in the mainboard BIOS ROM. At this time, you can measure that the address lines A0-A19 of the ISA should all be at high level: 1, that is, FFFF in hexadecimal)
This is my understanding of how the CPU reads BIOS instructions after power-on, and it is also the theoretical basis for me to repair "fatal failure" motherboards. I hope everyone can discuss together.
"The concept of address seems to be related to RAM (memory)" This is not correct? Whether it is ROM or RAM, for the CPU, it is the same, that is, each storage unit is accessed through address lines and data lines. Of course, the "mapping" of ROM will be implemented later.
Also, in POST, it seems that the first 64K of memory is checked?
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Floor 20 Posted 2004-10-06 00:00 ·  中国 重庆 城口县 电信
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aria:
1. Which model of motherboard is your BIOS source code from, and is it usable? Can you E-MAIL it to me?
2. ROM runs programs???!!! Then what does the CPU do?
All program code is executed by the CPU. RAM, ROM, are just "containers" for storing program code or data.
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Floor 21 Posted 2004-10-06 00:00 ·  中国 天津 南开区 联通
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Hehe learned a lot again. Thanks. Regarding the source code: that is from a book called "BIOS R & D Technology Analysis". After compression, it is more than 6M.
Floor 22 Posted 2004-10-07 00:00 ·  中国 广东 珠海 联通
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The following is the statement made by aria on 2004-10-3 16:16:20:

I want to ask: Since RAM cannot be used, then how is the SS segment set? Can't use call anymore?


Before effectively testing RAM, RAM cannot be used. It doesn't matter where the stack segment is because it won't be used, and of course, call cannot be used. All registers can be used, and the registers are defaulted to be good.
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Floor 23 Posted 2004-10-07 00:00 ·  中国 广东 珠海 联通
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Key point: The BIOS space is not within the 1M space, and it cannot be accessed with only 20 address lines. Normally, the BIOS cannot be read in real mode, even if you use the FFFF segment. In fact, the problem is not difficult. Just do a test yourself, read out the BIOS and you will know. If the BIOS can be read correctly, there must be a jump instruction encoded as EAH at ffffffff0.
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Floor 24 Posted 2004-10-07 00:00 ·  中国 重庆 城口县 电信
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Key point: The BIOS space is not within the 1M space, and it cannot be accessed with only 20 address lines. Normally, the BIOS cannot be read in real mode, even if you use the FFFF segment. In fact, the problem is not difficult. Just do an experiment yourself, read out the BIOS and you will know. If the BIOS can be read correctly, there must be a jump instruction encoded as EAH at FFFFFFF0. --------------------------"Just do an experiment yourself, read out the BIOS and you will know." Did you read it with a program after the computer normally boots? Or did you use "dedicated hardware" (at this time the computer has not completed the power-on self-test) to single-step track the BIOS after the CPU is powered on and reset?
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Floor 25 Posted 2004-10-07 00:00 ·  中国 广东 珠海 联通
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The following is the speech of yzz163 on October 7, 2004 at 15:42:55:

Key point: The BIOS space is not within the 1M space. It cannot be accessed with only 20 address lines. Normally, the BIOS cannot be read in real mode, even if you use the FFFF segment. In fact, the problem is not difficult. Just do an experiment yourself, read out the BIOS and you will know. If the BIOS can be read correctly, there must be a jump instruction encoded as EAH at ffffffff0.
--------------------------
"Just do an experiment yourself, read out the BIOS and you will know." Did you read it with a program after the computer normally boots? Or did you use "dedicated hardware" (at this time the computer has not completed the self-test) to single-step track the BIOS after the CPU is powered on and reset?

I read out the entire flash by programming. I haven't used "dedicated hardware".
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Floor 26 Posted 2004-10-07 00:00 ·  中国 广东 珠海 联通
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Regarding BIOS mapping to RAM: BIOS mapping to RAM is not necessary; it's just that running in ROM is too slow. It's mapped to make the execution speed faster. If the application doesn't frequently call BIOS, there's no need to map to RAM space, which can save RAM resources. Especially for users using the Windows operating system, there's absolutely no need to map because the basic functions of BIOS are real - mode code, which can't be used in protected mode. The hardware drivers under Windows are all re - loaded and won't use BIOS functions.
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Floor 27 Posted 2004-10-12 00:00 ·  中国 重庆 城口县 电信
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I have programmed to read the entire flash. ------------------ Are you reading the BIOS with a program after the computer starts? At this time, the BIOS should be mapped into memory. Different operating systems may have different mapped addresses. But now we are discussing the first instruction after the CPU resets: that is, how to read the BIOS.
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Floor 28 Posted 2004-10-12 00:00 ·  中国 重庆 城口县 电信
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The BIOS space is not within the 1M space, and it cannot be accessed using only 20 address lines. ----------------------------- For X86 series CPUs, after reset, they work in X086 mode, namely "real mode", and at this time they can only use 20 address lines. Of course, it may be different for other types of CPUs.
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Floor 29 Posted 2004-10-12 00:00 ·  中国 广东 珠海 联通
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Before the 286, the address space was 20 bits, and only 16-bit segment registers and 16-bit IP were sufficient. But the address space of the 286 is 24 bits, and that of the 386 is 32 bits. The address generation method is quite different from that of CPUs before the 286. In computers after the 386, the BIOS is placed in the 64K at the highest address space, with the first instruction at FFFFFFF0H. After the CPU resets, the first instruction is not calculated by CS shifted left by 4 bits plus IP. Although after reset cs = FFFFH, the address of the first instruction generated by the CPU has nothing to do with it. The base address is generated by another register (this register cannot be directly accessed). After the CPU resets, the value of this register is determined and ensures that with this base address and EIP = 0000FFF0H, it addresses to FFFFFFF0H. The first instruction is a far jump instruction. After executing the first instruction, cs is reloaded, and the base address register is also reloaded.
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Floor 30 Posted 2006-10-13 20:59 ·  中国 河南 郑州 联通
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bios在进行 RAM shadow 之前,CPU 的指令是从 BIOS ROM 中获取的,那个时候还没有 RAM,也就是说机器还不知道有 RAM,只有在进行 RAM shadow 之后,才会在 RAM 中存入内容,这才从 RAM 中的指令执行。

Originally posted by willsort at 2004-10-2 00:00:
Re All:

关于此句我有些疑问,地址的概念似乎是针对RAM(内存)来说的,而BIOS代码指令在ROM(无论是否可擦写)中。而这个地址FFFF:0,据我栮..


Before the BIOS performs RAM shadowing, the CPU's instructions are fetched from the BIOS ROM. At that time, there is no RAM yet, meaning the machine doesn't know about RAM. Only after performing RAM shadowing is content stored in RAM, and then execution proceeds from the instructions in RAM.
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