中国DOS联盟

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Register Factory and Warehouse, Power Energy, Manually Inputting Changing Chemical Information Materials.

Parallel Registers

Shift Registers



General Registers: EAX: General register. Compared with other registers, it is more commonly used in arithmetic operations. In protected mode, it can also be used as a memory offset pointer (at this time, DS is used as a segment register or selector)
EBX: General register. Usually used as a memory offset pointer (compared with EAX, ECX, EDX), DS is the default segment register or selector.
In protected mode, it can also play this role.
ECX: General register. Usually used for counting in specific instructions. In protected mode, it can also be used as a memory offset pointer (at this time, DS is used as a register or segment selector).
EDX: General register. In some operations, it is used as an overflow register of EAX (for example, multiplication and division).
In protected mode, it can also be used as a memory offset pointer (at this time, DS is used as a segment register or selector).
Similar to AX being divided into AH & AL, the above registers include corresponding 16-bit groups and 8-bit groups.

Flags Register: Flags Register (EFlags)
Carry Flag CF (Carry Flag) The carry flag CF is mainly used to reflect whether a carry or borrow is generated in the operation.
If a carry or borrow is generated in the highest bit of the operation result, then its value is 1, otherwise its value is 0.
The situations where this flag bit is used include: addition and subtraction operations of multi-word (byte) numbers, size comparison operations of unsigned numbers,
Shift operations, shifts between words (bytes), instructions that specifically change the CF value, etc.
Parity Flag PF (Parity Flag)
The parity flag PF is used to reflect the parity of the number of "1"s in the operation result.
If the number of "1"s is even, then the value of PF is 1, otherwise its value is 0.
Using PF can perform parity check and generate parity bits.
In the process of data transmission, in order to provide the reliability of transmission,
If the parity check method is adopted, this flag bit can be used.
Auxiliary Carry Flag AF (Auxiliary Carry Flag)
The value of the auxiliary carry flag AF is set to 1 in the following situations, otherwise its value is 0:
(1) When a carry or borrow occurs from the low byte to the high byte during a word operation;
(2) When a carry or borrow occurs from the low 4 bits to the high 4 bits during a byte operation.
For the above 6 operation result flag bits,
In general programming, the flag bits CF, ZF, SF, and OF are used more frequently,
While the flag bits PF and AF are used less frequently.
Zero Flag ZF (Zero Flag)
The zero flag ZF is used to reflect whether the operation result is 0. If the operation result is 0, then its value is 1, otherwise its value is 0.
When judging whether the operation result is 0, this flag bit can be used.
Sign Flag SF (Sign Flag)
The sign flag SF is used to reflect the sign bit of the operation result, which is the same as the highest bit of the operation result.
In the microcomputer system, signed numbers are represented in two's complement, so SF also reflects the positive or negative sign of the operation result.
When the operation result is positive, the value of SF is 0, otherwise its value is 1.
Overflow Flag OF (Overflow Flag)
The overflow flag OF is used to reflect whether the result of the signed number addition and subtraction operation overflows.
If the operation result exceeds the range that can be represented by the current operation bit, it is called an overflow, and the value of OF is set to 1,
Otherwise, the value of OF is cleared to 0. "
"Overflow" and "carry" are two concepts with different meanings, so don't confuse them.
I/O Privilege Flag IOPL (I/O Privilege Level)
The I/O privilege flag is represented by two binary bits, also called the I/O privilege level field.
This field specifies the privilege level required to execute I/O instructions.
If the current privilege level is numerically less than or equal to the value of IOPL, then this I/O instruction can be executed, otherwise a protection exception will occur.
Nested Task Flag NT (Nested Task)
The nested task flag NT is used to control the execution of the interrupt return instruction IRET. The specific regulations are as follows:
(1) When NT = 0, restore EFLAGS, CS, and EIP with the values saved in the stack, and perform a normal interrupt return operation;
(2) When NT = 1, the interrupt return is realized through task switching.
Restart Flag RF (Restart Flag)
The restart flag RF is used to control whether to accept debugging faults. It is stipulated that when RF = 0, it means "accept" debugging faults, otherwise it refuses.
After successfully executing an instruction, the processor sets RF to 0, and when a non-debugging fault is received, the processor sets it to 1.
Virtual 8086 Mode Flag VM (Virtual 8086 Mode)
If the value of this flag is 1, it means that the processor is in the working state in the virtual 8086 mode,
Otherwise, the processor is in the working state in the general protection mode

Segment Registers: Segment Registers (ES, CS, SS, DS, FS, and GS)
CS - Code Segment Register (Code Segment Register), the value is the segment value of the code segment;
DS - Data Segment Register (Data Segment Register), the value is the segment value of the data segment;
ES - Extra Segment Register (Extra Segment Register), the value is the segment value of the extra data segment;
SS - Stack Segment Register (Stack Segment Register), the value is the segment value of the stack segment;
FS - Extra Segment Register (Extra Segment Register), the value is the segment value of the extra data segment;
GS - Extra Segment Register (Extra Segment Register), the value is the segment value of the extra data segment


Vector Registers

Constant Registers

Floating-Point Registers

Address Registers

Special-Purpose Registers

Instruction Registers

Index Registers

Memory Buffer Register

Memory Data Register

Memory Address Register

Memory Type Range Register

AX
Accumulator Register: AH & AL = AX (accumulator): Accumulator register, often used in arithmetic operations; in instructions such as multiplication and division, it is specified to store operands, in addition,
All I/O instructions use this register to transfer data with external devices.
BX
Base Register: BH & BL = BX (base): Base register, often used for address indexing;

CX
Count Register: CH & CL = CX (count): Count register, often used for counting; often used to save the calculated value, such as used as an implicit counter in shift instructions, loops (loop), and string processing instructions

DX
Data Register: DH & DL = DX (data): Data register, often used for data transfer.
Data Registers (EAX, EBX, ECX, and EDX)

Pointer Registers: Pointer Registers (ESP and EBP)


Index Registers: ESI
ESI, EDI, SI, and DI are called Index Registers (Index Register)

SP
Stack Pointer: SP (Stack Pointer): Stack pointer, used in conjunction with SS, can point to the current stack position;

BP
Base Pointer Register: BP (Base Pointer): Base pointer register, can be used as a relative base position of SS;

SI
Source Index Register: SI (Source Index): The source index register can be used to store the source index pointer relative to the DS segment;

DI
Destination Index Register: DI (Destination Index): The destination index register can be used to store the destination index pointer relative to the ES segment.

CS
Code Segment Register: CS (Code Segment): Code segment register;

DS
Data Segment Register: DS (Data Segment): Data segment register;

SS
Stack Segment Register: SS (Stack Segment): Stack segment register;

ES
Extra Segment Register: ES (Extra Segment): Extra segment register

UxCTL Register

Control Registers: CR0, CR2, CR3 (Control Registers). For example, the role of CR0 is to switch between real mode and protected mode.

Debug Registers: D0, D1, D2, D3, D6, and D7 (Debug Registers). They can be used as hardware support for debuggers to set conditional breakpoints.

Test Registers: TR3, TR4, TR5, TR6, and TR? Registers (Test Registers) are used for certain conditional tests


Mode Indicator Register (Machine Indicator Register)




In-Depth Discussion, CPU Design Principles (Completed): caolizhen
https://bbs.kafan.cn/thread-563743-1-1.html

Last edited by zzz19760225 on 2018-9-19 at 19:11 ]

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DOS debug

ax
bx
cx
dx

sp
bp
si
di

ds
es
ss
cs

ip

rax
ax 0000:
ax 0000:100
r
ax=0100

All inputs can modify the information in them

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Last edited by zzz19760225 on 2017-12-28 at 20:52 ]

Last edited by zzz19760225 on 2017-12-28 at 20:52 ]

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Last edited by zzz19760225 on 2017-12-28 at 20:52 ]

Last edited by zzz19760225 on 2017-12-28 at 20:52 ]